ARD2  RC2
Airbag Reference Demonstrator using MPC5604P
DSPI.c
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00001 
00016 #include "derivative.h"
00017 #include "DSPI.h"
00018 /*
00019  ******************************************************************************
00020  * Constants
00021  ******************************************************************************
00022  */
00024 const uint8_t cau8DSPIInstances[N_DSPI_INSTANCES * N_DSPI_PRESETS] =
00025 {
00026   DSPI0C0, DSPI0C1, DSPI0C2, DSPI0C3, DSPI0C4, DSPI0C5, DSPI0C6, DSPI0C7,
00027   DSPI1C0, DSPI1C1, DSPI1C2, DSPI1C3, DSPI1C4, DSPI1C5, DSPI1C6, DSPI1C7,
00028   DSPI2C0, DSPI2C1, DSPI2C2, DSPI2C3, DSPI2C4, DSPI2C5, DSPI2C6, DSPI2C7,
00029   DSPI3C0, DSPI3C1, DSPI3C2, DSPI3C3, DSPI3C4, DSPI3C5, DSPI3C6, DSPI3C7 };
00030 
00032 const DSPI_t catDSPIInstances[N_DSPI_INSTANCES] =
00033 {
00034   &DSPI_0, &DSPI_1, &DSPI_2, &DSPI_3 };
00035 /*
00036  ******************************************************************************
00037  * Globals
00038  ******************************************************************************
00039  */
00041 vuint8_t gau8DSPIBuffSize[N_DSPI_INSTANCES];
00043 vuint8_t gau8DSPIWordsRx[N_DSPI_INSTANCES];
00045 vuint8_t gau8DSPITransferSize[N_DSPI_INSTANCES];
00047 vuint8_t gau8DSPITxFIFOIsEnabled[N_DSPI_INSTANCES];
00049 vuint8_t gau8DSPIRxFIFOIsEnabled[N_DSPI_INSTANCES];
00051 vuint16_t* gpu16DSPITxBuffer[N_DSPI_INSTANCES];
00053 vuint16_t* gpu16DSPIRxBuffer[N_DSPI_INSTANCES];
00055 vuint8_t* gpu8DSPITxBuffer[N_DSPI_INSTANCES];
00057 vuint8_t* gpu8DSPIRxBuffer[N_DSPI_INSTANCES];
00058 /*
00059  ******************************************************************************
00060  * u8fnDSPITranscieve
00061  ******************************************************************************
00062  */
00063 uint8_t u8fnDSPITranscieve(const uint8_t u8MyInstanceWCTAR,
00064                            const uint8_t u8CSEnable, uint16_t* pu16DSPITx,
00065                            uint16_t* pu16DSPIRx, const uint8_t u8Size)
00066 {
00067   /* Local variables */
00068   uint8_t u8Status;
00069   DSPI_t ptMyDSPI;
00070   DSPIInstance_t tMyInstance;
00071   
00072   /* Init local variables */
00073   u8Status = CLEAR;
00074   
00075   /* From this point on, use tMyInstance instead of u8MyInstance */
00076   tMyInstance.W = u8MyInstanceWCTAR;
00077   ptMyDSPI = catDSPIInstances[tMyInstance.P.Instance];
00078   
00079   /* Make sure there's no on-going transmission before performing any task   */
00080   if(CLEAR == u8fnIsDSPIBusy(tMyInstance.P.Instance))
00081   {
00082     /* Copy arguments to global variables, adjusting accordingly the buffer  */
00083     /* size to the frame size.                                               */
00084     if((BITS_IN_BYTE - 1u) < ptMyDSPI->CTAR[tMyInstance.P.CTAR].B.FMSZ)
00085     {
00086       gpu16DSPITxBuffer[tMyInstance.P.Instance] = pu16DSPITx;
00087       gpu16DSPIRxBuffer[tMyInstance.P.Instance] = pu16DSPIRx;
00088       gau8DSPITransferSize[tMyInstance.P.Instance] = DSPI_FULL_TRANSFER_BITS;
00089     }
00090     else
00091     {
00092       gpu8DSPITxBuffer[tMyInstance.P.Instance] = (uint8_t*)pu16DSPITx;
00093       gpu8DSPIRxBuffer[tMyInstance.P.Instance] = (uint8_t*)pu16DSPIRx;
00094       gau8DSPITransferSize[tMyInstance.P.Instance] = BITS_IN_BYTE;
00095     }
00096     gau8DSPIBuffSize[tMyInstance.P.Instance] = u8Size;
00097     gau8DSPIWordsRx[tMyInstance.P.Instance] = CLEAR;
00098     
00099     /* Enable Previuosly configured SPI */
00100     vfnDSPIEnable(tMyInstance, u8CSEnable, TRUE);
00101   }
00102   else
00103   {
00104     /* Flag as an issue */
00105     u8Status = DSPI_BUSY_WITH_PREVIOUS_TX;
00106   }
00107   
00108   return (u8Status);
00109 }
00110 
00111 /*
00112  ******************************************************************************
00113  * vfnDSPIEnable
00114  ******************************************************************************
00115  */
00116 void vfnDSPIEnable(const DSPIInstance_t tMyInstance, const uint8_t u8CSEnable,
00117                    const uint8_t u8Start)
00118 {
00119   /* Local variables */
00120   DSPI_t ptMyDSPI;
00121   uint32_t u32MyPUSHR;
00122   
00123   /* Start by selecting the correct SPI unit */
00124   ptMyDSPI = catDSPIInstances[tMyInstance.P.Instance];
00125   
00126   if(CLEAR != u8Start)
00127   {
00128     /* Depending on the state of FIFO, enable or disable interrupts. Take a  */
00129     /* look at u8fnConfigDSPIGeneral for more info.                          */
00130     if(TRUE == gau8DSPITxFIFOIsEnabled[tMyInstance.P.Instance])
00131     {
00132       /* In this case, FIFO is enabled; TCFRE is disabled */
00133       ptMyDSPI->RSER.B.TCFRE = CLEAR;
00134       /* End of Queue must be enabled */
00135       ptMyDSPI->RSER.B.EOQFRE = TRUE;
00136     }
00137     else
00138     {
00139       /* In this case, FIFO is disabled, TCF shall be enabled */
00140       ptMyDSPI->RSER.B.TCFRE = TRUE;
00141       /* End of Queue must be disabled */
00142       ptMyDSPI->RSER.B.EOQFRE = CLEAR;
00143     }
00144 
00145     /* Write everything to a 32-bit variable first since PUSHR likes 32-bit  */
00146     /* data-transfers only. Include CTAS, u8CSEnable, and data to send.      */
00147     u32MyPUSHR = (((uint32_t)(tMyInstance.P.CTAR)) << 28);
00148     u32MyPUSHR |= (((uint32_t)u8CSEnable) << 16);
00149     
00150     /* Send the next byte according to the pointer */
00151     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[tMyInstance.P.Instance])
00152     {
00153       u32MyPUSHR |= *(gpu16DSPITxBuffer[tMyInstance.P.Instance])++;
00154     }
00155     else
00156     {
00157       u32MyPUSHR |= *(gpu8DSPITxBuffer[tMyInstance.P.Instance])++;
00158     }
00159 
00160     /* Decrement counter once */
00161     gau8DSPIBuffSize[tMyInstance.P.Instance]--;
00162     
00163     /* If this is the last word to send, flag an End-of-Queue */
00164     if(CLEAR == gau8DSPIBuffSize[tMyInstance.P.Instance])
00165     {
00166       u32MyPUSHR |= PUSHR_EOQ_MASK;
00167     }
00168     else
00169     {
00170       /* Nothing */
00171     }
00172 
00173     ptMyDSPI->PUSHR.R = u32MyPUSHR;
00174     
00175     /* Pass to a running mode in the DSPI state-machine. Here because        */
00176     /* enabling EOQ interrupts will take us directly to that interrupt       */
00177     ptMyDSPI->MCR.B.HALT = CLEAR;
00178     
00179     /* Enable FIFO if this was the proper config and                         */
00180     /* there's still data to send                                            */
00181     if(CLEAR != gau8DSPIBuffSize[tMyInstance.P.Instance])
00182     {
00183       ptMyDSPI->RSER.B.TFFFRE = gau8DSPITxFIFOIsEnabled[tMyInstance.P.Instance];
00184       ptMyDSPI->RSER.B.RFDFRE = gau8DSPIRxFIFOIsEnabled[tMyInstance.P.Instance];
00185     }
00186     else
00187     {
00188       /* Let's try going directly to EOQ interrupt instead */
00189     }
00190   }
00191   else
00192   {
00193     /* Pass to a stop mode in the DSPI state-machine */
00194     ptMyDSPI->MCR.B.HALT = TRUE;
00195   }
00196   
00197   return;
00198 }
00199 /*
00200  ******************************************************************************
00201  * u8fnDSPIStatus
00202  ******************************************************************************
00203  */
00204 uint32_t u32fnDSPIStatus(uint8_t u8Instance)
00205 {
00206   return (catDSPIInstances[u8Instance]->SR.R);
00207 }
00208 /*
00209  ******************************************************************************
00210  * u8fnConfigDSPIPreset
00211  ******************************************************************************
00212  */
00213 uint8_t u8fnConfigDSPIGeneral(const DSPIConfig_t* tDSPIConfig)
00214 {
00215   uint8_t u8Status;
00216   DSPI_t ptMyDSPI;
00217   
00218   u8Status = CLEAR;
00219   
00220   /* Start by selecting the correct SPI unit */
00221   ptMyDSPI = catDSPIInstances[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance];
00222   
00223   /* Only continue if Disable is not set and the instance is halted */
00224   if((CLEAR == tDSPIConfig->P.Disable) && (TRUE == ptMyDSPI->MCR.B.HALT))
00225   {
00226     /* Flush Buffers */
00227     ptMyDSPI->MCR.B.CLR_TXF = TRUE;
00228     ptMyDSPI->MCR.B.CLR_RXF = TRUE;
00229     
00230     /* Select the Mode */
00231     ptMyDSPI->MCR.B.MSTR = tDSPIConfig->P.Mode;
00232     
00233     /* Enable continuous mode if this is the choice */
00234     ptMyDSPI->MCR.B.CONT_SCKE = tDSPIConfig->P.ContClock;
00235     
00236     /* Enable or disable DSPI FIFO buffers */
00237     ptMyDSPI->MCR.B.DIS_TXF = tDSPIConfig->P.TxFIFODis;
00238     ptMyDSPI->MCR.B.DIS_RXF = tDSPIConfig->P.RxFIFODis;
00239     
00240     /* Set the CS state when not transmitting */
00241     ptMyDSPI->MCR.B.PCSIS7 = tDSPIConfig->P.CS7HiWhenInactive;
00242     ptMyDSPI->MCR.B.PCSIS6 = tDSPIConfig->P.CS6HiWhenInactive;
00243     ptMyDSPI->MCR.B.PCSIS5 = tDSPIConfig->P.CS5HiWhenInactive;
00244     ptMyDSPI->MCR.B.PCSIS4 = tDSPIConfig->P.CS4HiWhenInactive;
00245     ptMyDSPI->MCR.B.PCSIS3 = tDSPIConfig->P.CS3HiWhenInactive;
00246     ptMyDSPI->MCR.B.PCSIS2 = tDSPIConfig->P.CS2HiWhenInactive;
00247     ptMyDSPI->MCR.B.PCSIS1 = tDSPIConfig->P.CS1HiWhenInactive;
00248     ptMyDSPI->MCR.B.PCSIS0 = tDSPIConfig->P.CS0HiWhenInactive;
00249     
00250     /* Configure Interrupts/DMA based on FIFO buffer config */
00251     /* Start with Tx */
00252     if(CLEAR == tDSPIConfig->P.TxFIFODis)
00253     {
00254       /* If FIFO is enabled, flag for future */
00255       gau8DSPITxFIFOIsEnabled[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance] = TRUE;
00256       ptMyDSPI->RSER.B.TCFRE = CLEAR;
00257     }
00258     else
00259     {
00260       /* Use the Tx empty interrupt */
00261       gau8DSPITxFIFOIsEnabled[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance]
00262           = CLEAR;
00263       ptMyDSPI->RSER.B.TFFFRE = CLEAR;
00264       ptMyDSPI->RSER.B.TCFRE = tDSPIConfig->P.ISRTxEn;
00265     }
00266 
00267     /* Do the same for Rx - if Rx FIFOs are enabled, use Rx Interrupt */
00268     if(CLEAR == tDSPIConfig->P.RxFIFODis)
00269     {
00270       /* If FIFO is enabled, use the Rx interrupt */
00271       gau8DSPIRxFIFOIsEnabled[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance] = TRUE;
00272       ptMyDSPI->RSER.B.RFDFRE = tDSPIConfig->P.ISRRxEn;
00273       ptMyDSPI->RSER.B.RFOFRE = CLEAR;
00274     }
00275     else
00276     {
00277       /* Use the Tx full interrupt */
00278       gau8DSPIRxFIFOIsEnabled[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance]
00279           = CLEAR;
00280       ptMyDSPI->RSER.B.RFDFRE = CLEAR;
00281       ptMyDSPI->RSER.B.RFOFRE = CLEAR;
00282     }
00283 
00284     /* If FIFO is enabled, use the FIFO interrupt */
00285     /* Configure DMA as well - it will only play a role if FIFO is enabled */
00286     ptMyDSPI->RSER.B.TFFFDIRS = tDSPIConfig->P.ISRTxDMAEn;
00287     ptMyDSPI->RSER.B.RFDFDIRS = tDSPIConfig->P.ISRRxDMAEn;
00288     
00289   }
00290   else
00291   {
00292     /* Just flag in status and exit */
00293     u8Status = DSPI_NOT_HALTED;
00294   }
00295   
00296   return (u8Status);
00297 }
00298 /*
00299  ******************************************************************************
00300  * u8fnConfigDSPIPreset
00301  ******************************************************************************
00302  */
00303 uint8_t u8fnConfigDSPIPreset(const DSPIPresetConfig_t* tDSPIConfig)
00304 {
00305   /* Declare local variables */
00306   uint8_t u8Status;
00307   DSPI_t ptMyDSPI;
00308   
00309   /* Init local variables */
00310   u8Status = CLEAR;
00311   
00312   /* Start by selecting the correct SPI unit */
00313   ptMyDSPI = catDSPIInstances[(uint8_t)tDSPIConfig->P.MyDSPI.P.Instance];
00314   
00315   /* Now we can configure accordingly */
00316   /* Start by setting baud rate settings */
00317   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.DBR
00318       = tDSPIConfig->P.BaudRateDoubler;
00319   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.PBR
00320       = tDSPIConfig->P.BaudRatePrescaler;
00321   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.BR = tDSPIConfig->P.BaudRate;
00322   
00323   /* Polarity and phase */
00324   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.CPHA = tDSPIConfig->P.CPhase;
00325   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.CPOL = tDSPIConfig->P.CPol;
00326   
00327   /* Determine the delay after CS goes down */
00328   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.CSSCK = tDSPIConfig->P.CSSCK;
00329   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.PCSSCK = tDSPIConfig->P.PCSSCK;
00330   
00331   /* Determine the order (LSB first/ MSB first */
00332   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.LSBFE
00333       = tDSPIConfig->P.LSBFirst;
00334   
00335   /* Set Frame Size */
00336   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.FMSZ
00337       = tDSPIConfig->P.FrameSize;
00338   
00339   /* Delay between CS transfers is hard-coded below */
00340   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.DT
00341       = tDSPIConfig->P.DelayAfterTransfer; //DSPI_DELAY_POST_TRANSFER;
00342   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.PDT
00343       = tDSPIConfig->P.DelayAfterTransferPrescaler; //DSPI_PDT_DEFAULT;
00344 
00345   /* Delay between last clock and CS going high is hard-coded here */
00346   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.ASC
00347       = tDSPIConfig->P.LagAfterLastClk;// DSPI_DELAY_AFTER_SCK;
00348   ptMyDSPI->CTAR[tDSPIConfig->P.MyDSPI.P.CTAR].B.PASC
00349       = tDSPIConfig->P.LagAfterLastClkPrescaler;// DSPI_PRESCALER_AFTER_SCK;
00350 
00351   return (u8Status);
00352 }
00353 /*
00354  ******************************************************************************
00355  * u8fnReadBackDSPIInstance
00356  ******************************************************************************
00357  */
00358 static uint8_t u8fnReadBackDSPIInstance(DSPI_t ptMyDSPI)
00359 {
00360   uint8_t u8Instance;
00361   
00362   switch((uint32_t)ptMyDSPI)
00363   {
00364     case ((uint32_t)&DSPI_3):
00365     {
00366       u8Instance = 3;
00367       break;
00368     }
00369     case ((uint32_t)&DSPI_2):
00370     {
00371       u8Instance = 2;
00372       break;
00373     }
00374     case ((uint32_t)&DSPI_1):
00375     {
00376       u8Instance = 1;
00377       break;
00378     }
00379     case ((uint32_t)&DSPI_0):
00380     {
00381       u8Instance = CLEAR;
00382       break;
00383     }
00384   }; /* End switch-case */
00385   
00386   return (u8Instance);
00387 }
00388 /*
00389  ******************************************************************************
00390  * vfnGenericDSPIFUFISR
00391  ******************************************************************************
00392  */
00393 uint8_t u8fnIsDSPIBusy(uint8_t u8Instance)
00394 {
00395   /* Declare local variables */
00396   uint8_t u8Status;
00397   
00398   /* Init local variables */
00399   u8Status = DSPI_STATUS_CLEAR;
00400   
00401   /* Is the DSPI SM running ? */
00402   if(CLEAR == catDSPIInstances[u8Instance]->MCR.B.HALT)
00403   {
00404     u8Status = DSPI_BUSY_WITH_PREVIOUS_TX;
00405   }
00406   else
00407   {
00408     /* We can configure */
00409   }
00410   return (u8Status);
00411 }
00412 /*
00413  ******************************************************************************
00414  * u32fnFormatDSPIPUSHR
00415  ******************************************************************************
00416  */
00417 uint32_t u32fnFormatDSPIPUSHR(uint8_t u8DSPIInstanceWCTAR, uint8_t u8CS,
00418                               uint8_t u8ContCS, uint8_t u8EndOfQueueFlag,
00419                               uint16_t u16Msg)
00420 {
00421   return ((uint32_t)u16Msg | (uint32_t)(u8CS << 16u) | 
00422       (uint32_t)((u8DSPIInstanceWCTAR & 0x0Fu) << 28u) | 
00423       (uint32_t)(u8ContCS << 31u) | 
00424       (uint32_t)((u8EndOfQueueFlag & 0x01) << 27u));
00425 }
00426 /*
00427  ******************************************************************************
00428  * u8fnDSPISwitchIsrMode
00429  ******************************************************************************
00430  */
00431 uint8_t u8fnDSPISwitchIsrMode(uint8_t u8DSPIInstanceWCTAR, uint8_t u8IsrMode)
00432 {
00433   /* Locals */
00434   uint8_t u8Status;
00435   DSPI_t tMyDSPI;
00436   
00437   /* Init variables */
00438   u8Status = CLEAR;
00439   tMyDSPI = catDSPIInstances[u8DSPIInstanceWCTAR >> 4u];
00440   
00441   /* Whatever we're doing, we're stopping right now. */
00442   tMyDSPI->MCR.B.HALT = TRUE;
00443   
00444   /* Switch modes according to u8IsrMode */
00445   tMyDSPI->RSER.B.TFFFDIRS = (u8IsrMode & BIT0);
00446   tMyDSPI->RSER.B.RFDFDIRS = (u8IsrMode & BIT0);
00447   
00448   /* Also, if DMA is enable, the general enable bit for the SPI should be on */
00449   tMyDSPI->MCR.B.HALT = !(u8IsrMode & BIT0);
00450   
00451   /* Make sure TFFF is enabled in order to trigger a DMA transfer */
00452   DSPI_0.RSER.B.TFFFRE = (u8IsrMode & BIT0);
00453   
00454   return (u8Status);
00455 }
00456 /*
00457  ******************************************************************************
00458  * vfnGenericDSPIFUFISR
00459  ******************************************************************************
00460  */
00461 static void vfnGenericDSPIFUFISR(DSPI_t tpActiveDSPI)
00462 {
00463   /* Nothing - Device always configured as Master */
00464   (void)tpActiveDSPI;
00465   return;
00466 }
00467 /*
00468  ******************************************************************************
00469  * vfnDSPI0FUFISR
00470  ******************************************************************************
00471  */
00472 void vfnDSPI0FUFISR(void)
00473 {
00474   vfnGenericDSPIFUFISR(&DSPI_0);
00475   return;
00476 }
00477 /*
00478  ******************************************************************************
00479  * vfnDSPI1FUFISR
00480  ******************************************************************************
00481  */
00482 void vfnDSPI1FUFISR(void)
00483 {
00484   vfnGenericDSPIFUFISR(&DSPI_1);
00485   return;
00486 }
00487 /*
00488  ******************************************************************************
00489  * vfnDSPI2FUFISR
00490  ******************************************************************************
00491  */
00492 void vfnDSPI2FUFISR(void)
00493 {
00494   vfnGenericDSPIFUFISR(&DSPI_2);
00495   return;
00496 }
00497 /*
00498  ******************************************************************************
00499  * vfnDSPI3FUFISR
00500  ******************************************************************************
00501  */
00502 void vfnDSPI3FUFISR(void)
00503 {
00504   vfnGenericDSPIFUFISR(&DSPI_3);
00505   return;
00506 }
00507 /*
00508  ******************************************************************************
00509  * vfnGenericDSPITCFIsr
00510  ******************************************************************************
00511  */
00512 static void vfnGenericDSPITCFIsr(uint8_t u8Instance)
00513 {
00514   /* Local variables */
00515   DSPI_t ptMyDSPI;
00516   
00517   /* Make the DSPI instance explicit */
00518   ptMyDSPI = catDSPIInstances[u8Instance];
00519   
00520   /* Is this the last time we come in here? */
00521   if(CLEAR == gau8DSPIBuffSize[u8Instance])
00522   {
00523     /* Disable future interrupts */
00524     ptMyDSPI->RSER.B.TCFRE = CLEAR;
00525     
00526     /* Read-back reception accordingly */
00527     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[u8Instance])
00528     {
00529       *gpu16DSPIRxBuffer[u8Instance] = (uint16_t)ptMyDSPI->POPR.B.RXDATA;
00530       (gpu16DSPIRxBuffer[u8Instance])++;
00531     }
00532     else
00533     {
00534       *gpu8DSPIRxBuffer[u8Instance] = (uint8_t)ptMyDSPI->POPR.B.RXDATA;
00535       (gpu8DSPIRxBuffer[u8Instance])++;
00536     }
00537   }
00538   else
00539   {
00540     /* Place next byte in buffer depending on what format we're using */
00541     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[u8Instance])
00542     {
00543       ptMyDSPI->PUSHR.B.TXDATA = *gpu16DSPITxBuffer[u8Instance];
00544       /* Read incoming byte in buffer */
00545       *gpu16DSPIRxBuffer[u8Instance] = (uint16_t)ptMyDSPI->POPR.B.RXDATA;
00546       
00547       (gpu16DSPITxBuffer[u8Instance])++;
00548       (gpu16DSPIRxBuffer[u8Instance])++;
00549     }
00550     else
00551     {
00552       ptMyDSPI->PUSHR.B.TXDATA = *gpu8DSPITxBuffer[u8Instance];
00553       /* Read incoming byte in buffer */
00554       *gpu8DSPIRxBuffer[u8Instance] = (uint8_t)ptMyDSPI->POPR.B.RXDATA;
00555       (gpu8DSPITxBuffer[u8Instance])++;
00556       (gpu8DSPIRxBuffer[u8Instance])++;
00557     } /* End else */
00558     
00559     /* Decrement Tx Buffer Size */
00560     gau8DSPIBuffSize[u8Instance]--;
00561   } /* End else */
00562   
00563   /* Increment Rx Buffer Size */
00564   gau8DSPIWordsRx[u8Instance]++;
00565   
00566   /* Clear existing flag by writing to it - also clears the receive flag */
00567   ptMyDSPI->SR.B.TCF = TRUE;
00568   
00569   return;
00570 }
00571 /*
00572  ******************************************************************************
00573  * vfnDSPI0TCFIsr
00574  ******************************************************************************
00575  */
00576 void vfnDSPI0TCFIsr(void)
00577 {
00578   vfnGenericDSPITCFIsr(0u);
00579   return;
00580 }
00581 /*
00582  ******************************************************************************
00583  * vfnDSPI1TCFIsr
00584  ******************************************************************************
00585  */
00586 void vfnDSPI1TCFIsr(void)
00587 {
00588   vfnGenericDSPITCFIsr(1u);
00589   return;
00590 }
00591 /*
00592  ******************************************************************************
00593  * vfnDSPI2TCFIsr
00594  ******************************************************************************
00595  */
00596 void vfnDSPI2TCFIsr(void)
00597 {
00598   vfnGenericDSPITCFIsr(2u);
00599   return;
00600 }
00601 /*
00602  ******************************************************************************
00603  * vfnDSPI3TCFIsr
00604  ******************************************************************************
00605  */
00606 void vfnDSPI3TCFIsr(void)
00607 {
00608   vfnGenericDSPITCFIsr(3u);
00609   return;
00610 }
00611 /*
00612  ******************************************************************************
00613  * vfnGenericDSPIRFDFIsr
00614  * This interrupt is entered when FIFOs are enabled and data can be read.
00615  ******************************************************************************
00616  */
00617 static void vfnGenericDSPIRFDFIsr(uint8_t u8Instance)
00618 {
00619   /* Local variables */
00620   DSPI_t ptMyDSPI;
00621   
00622   /* Make the DSPI instance explicit */
00623   ptMyDSPI = catDSPIInstances[u8Instance];
00624   
00625   if(CLEAR != ptMyDSPI->SR.B.RFDF)
00626   {
00627     
00628     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[u8Instance])
00629     {
00630       *gpu16DSPIRxBuffer[u8Instance] = (uint16_t)ptMyDSPI->POPR.B.RXDATA;
00631       (gpu16DSPIRxBuffer[u8Instance])++;
00632       gau8DSPIWordsRx[u8Instance]++;
00633     }
00634     else
00635     {
00636       *gpu8DSPIRxBuffer[u8Instance] = (uint8_t)ptMyDSPI->POPR.B.RXDATA;
00637       (gpu8DSPIRxBuffer[u8Instance])++;
00638       gau8DSPIWordsRx[u8Instance]++;
00639     }
00640   }
00641   else
00642   {
00643     /* Just leave */
00644   }
00645   ptMyDSPI->SR.B.RFDF = TRUE;
00646   return;
00647 }
00648 /*
00649  ******************************************************************************
00650  * vfnDSPI0RFDFIsr
00651  ******************************************************************************
00652  */
00653 void vfnDSPI0RFDFIsr(void)
00654 {
00655   vfnGenericDSPIRFDFIsr(0u);
00656   return;
00657 }
00658 /*
00659  ******************************************************************************
00660  * vfnDSPI1RFDFIsr
00661  ******************************************************************************
00662  */
00663 void vfnDSPI1RFDFIsr(void)
00664 {
00665   vfnGenericDSPIRFDFIsr(1u);
00666   return;
00667 }
00668 /*
00669  ******************************************************************************
00670  * vfnDSPI2RFDFIsr
00671  ******************************************************************************
00672  */
00673 void vfnDSPI2RFDFIsr(void)
00674 {
00675   vfnGenericDSPIRFDFIsr(2u);
00676   return;
00677 }
00678 /*
00679  ******************************************************************************
00680  * vfnDSPI3RFDFIsr
00681  ******************************************************************************
00682  */
00683 void vfnDSPI3RFDFIsr(void)
00684 {
00685   vfnGenericDSPIRFDFIsr(3u);
00686   return;
00687 }
00688 /*
00689  ******************************************************************************
00690  * vfnGenericDSPIEOQIsr
00691  ******************************************************************************
00692  */
00693 static void vfnGenericDSPIEOQIsr(uint8_t u8Instance)
00694 {
00695   /* Local variables */
00696   DSPI_t ptMyDSPI;
00697   DSPIInstance_t tInstance;
00698   
00699   /* Make the DSPI instance explicit */
00700   ptMyDSPI = catDSPIInstances[u8Instance];
00701   tInstance.P.Instance = u8Instance;
00702   
00703   /* If there still data in the receive buffer, read it */
00704   if(TRUE == ptMyDSPI->SR.B.RFDF)
00705   {
00706     do
00707     {
00708     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[u8Instance])
00709     {
00710       *gpu16DSPIRxBuffer[u8Instance] = (uint16_t)ptMyDSPI->POPR.B.RXDATA;
00711       (gpu16DSPIRxBuffer[u8Instance])++;
00712       gau8DSPIWordsRx[tInstance.P.Instance]++;
00713     }
00714     else
00715     {
00716       *gpu8DSPIRxBuffer[u8Instance] = (uint8_t)ptMyDSPI->POPR.B.RXDATA;
00717       (gpu8DSPIRxBuffer[u8Instance])++;
00718       gau8DSPIWordsRx[u8Instance]++;
00719     }
00720   }while(CLEAR < ptMyDSPI->SR.B.RXCTR);
00721 }
00722 else
00723 {
00724   /* Don't read anything */
00725 }
00726 
00727 /* Disable DSPI */
00728 vfnDSPIEnable(tInstance, TRUE, CLEAR);
00729 
00730 /* Clear existing flag by writing to it */
00731 ptMyDSPI->SR.B.EOQF = TRUE;
00732 
00733 return;
00734 }
00735 /*
00736  ******************************************************************************
00737  * vfnDSPI0TCFIsr
00738  ******************************************************************************
00739  */
00740 void vfnDSPI0EOQIsr(void)
00741 {
00742   vfnGenericDSPIEOQIsr(0);
00743   return;
00744 }
00745 /*
00746  ******************************************************************************
00747  * vfnDSPI1TCFIsr
00748  ******************************************************************************
00749  */
00750 void vfnDSPI1EOQIsr(void)
00751 {
00752   vfnGenericDSPIEOQIsr(1);
00753   return;
00754 }
00755 /*
00756  ******************************************************************************
00757  * vfnDSPI2TCFIsr
00758  ******************************************************************************
00759  */
00760 void vfnDSPI2EOQIsr(void)
00761 {
00762   vfnGenericDSPIEOQIsr(2);
00763   return;
00764 }
00765 /*
00766  ******************************************************************************
00767  * vfnDSPI3TCFIsr
00768  ******************************************************************************
00769  */
00770 void vfnDSPI3EOQIsr(void)
00771 {
00772   vfnGenericDSPIEOQIsr(3);
00773   return;
00774 }
00775 /*
00776  ******************************************************************************
00777  * vfnGenericDSPITFFFIsr
00778  * This interrupt is taken if FIFO buffer is enabled.
00779  ******************************************************************************
00780  */
00781 static void vfnGenericDSPITFFFIsr(uint8_t u8Instance)
00782 {
00783   /* Local variables */
00784   DSPI_t ptMyDSPI;
00785   uint8_t u8NoMoreDataToTx;
00786   uint32_t u32LocalPUSHR;
00787   
00788   /* Init local variables */
00789   u8NoMoreDataToTx = CLEAR;
00790   
00791   /* Remember: PUSHR register only likes 32-bit words written to it. If      */
00792   /* a register is addressed directly, the compiled instructions write the   */
00793   /* whole register, essentially starting a new SPI transfer. That is why we */
00794   /* use u32LocalPUSHR - to construct what we want to send before sending it */
00795   u32LocalPUSHR = CLEAR;
00796   
00797   /* Make the DSPI instance explicit */
00798   ptMyDSPI = catDSPIInstances[u8Instance];
00799   
00800   /* Clear existing flag by writing to it - also clears the receive flag */
00801   ptMyDSPI->SR.B.TFFF = TRUE;
00802   
00803   /* Loop while there's data or the DSPI buffer has still some space left */
00804   if(DSPI_FIFO_BUFFER_DEPTH > ptMyDSPI->SR.B.TXCTR)
00805   {
00806     if(CLEAR == --gau8DSPIBuffSize[u8Instance])
00807     {
00808       u8NoMoreDataToTx = TRUE;
00809       ptMyDSPI->RSER.B.TFFFRE = CLEAR;
00810       
00811     }
00812     else
00813     {
00814       u8NoMoreDataToTx = CLEAR;
00815       ptMyDSPI->RSER.B.TFFFRE = TRUE;
00816     }
00817 
00818     /* Place next byte in local buffer depending on what format we're using */
00819     if(DSPI_FULL_TRANSFER_BITS == gau8DSPITransferSize[u8Instance])
00820     {
00821       u32LocalPUSHR = *gpu16DSPITxBuffer[u8Instance];
00822       (gpu16DSPITxBuffer[u8Instance])++;
00823     }
00824     else
00825     {
00826       u32LocalPUSHR = *gpu8DSPITxBuffer[u8Instance];
00827       (gpu8DSPITxBuffer[u8Instance])++;
00828     }
00829 
00830     /* Place the EOQ value according to this being the last word or not */
00831     u32LocalPUSHR |= (u8NoMoreDataToTx << 27u);
00832     u32LocalPUSHR |= (ptMyDSPI->PUSHR.R & 0xF7FF0000u);
00833     
00834     /* Write to the SPI */
00835     ptMyDSPI->PUSHR.R = u32LocalPUSHR;
00836   }
00837   else
00838   {
00839     /* Exit */
00840   }
00841   return;
00842 }
00843 /*
00844  ******************************************************************************
00845  * vfnDSPI0TCFIsr
00846  ******************************************************************************
00847  */
00848 void vfnDSPI0TFFFIsr(void)
00849 {
00850   vfnGenericDSPITFFFIsr(0u);
00851   return;
00852 }
00853 /*
00854  ******************************************************************************
00855  * vfnDSPI1TFFFIsr
00856  ******************************************************************************
00857  */
00858 void vfnDSPI1TFFFIsr(void)
00859 {
00860   vfnGenericDSPITFFFIsr(1u);
00861   return;
00862 }
00863 /*
00864  ******************************************************************************
00865  * vfnDSPI2TFFFIsr
00866  ******************************************************************************
00867  */
00868 void vfnDSPI2TFFFIsr(void)
00869 {
00870   vfnGenericDSPITFFFIsr(2u);
00871   return;
00872 }
00873 /*
00874  ******************************************************************************
00875  * vfnDSPI3TFFFIsr
00876  ******************************************************************************
00877  */
00878 void vfnDSPI3TFFFIsr(void)
00879 {
00880   vfnGenericDSPITFFFIsr(3u);
00881   return;
00882 }
00883 /*
00884  ******************************************************************************
00885  *
00886  *  End of file.
00887  *
00888  ******************************************************************************
00889  */